feat: make RAM word aligned, add byte_enable

Support sb, sh, lb, lh using byte enable
instead of non-word aligned reads and writes.

fix: jump according to zero flag, not LSB zero!!

fix: offset ram by bytes, not bits

feat: implement sb, sh, lb, lh support via masking

fix: make sure alu is zeroed on memory load, write, jump

fix: shift by 5 bits in alu

fix: do not set subtract for non-R instructions

fix: make immediates sign extended

fix: remove duplicit instruction and pc in cpu

fix: force alu operation to addition for storing memory and pc

fix: do not use immediate in alu src for SB

fix: propagate conditional jump from control_unit

refactor: move memory out of cpu

The cpu will have external memory,
that will allow for better testing
capabilities, and also makes more
sense.

refactor: change program mem to file prog mem

fix(register_file): output register if addr not zero

feat: add cpu top level entity

feat: add control_unit wrapper over instruction_decoder

chore: add cpu types for various sources

Better orientation by name instead of
number

feat: add program counter

feat: add program memory