feat: make RAM word aligned, add byte_enable

Support sb, sh, lb, lh using byte enable
instead of non-word aligned reads and writes.

test: add cpu testbenches for c programs

feat: add gcd program for testing

fix: jump according to zero flag, not LSB zero!!

feat: add branches.c test

test: add ram test

chore: add generated bin, obj gitignore files

fix(Makefile): make objdump and all testbenches work

chore: add risc toolchain to flake

chore: remove gcc generated file

fix: offset ram by bytes, not bits

feat: add basic testing programs

chore: add makefile for both verilog and c

feat: implement sb, sh, lb, lh support via masking

fix: make sure alu is zeroed on memory load, write, jump

fix: shift by 5 bits in alu

fix: do not set subtract for non-R instructions

fix: make immediates sign extended

test: add simple cpu test

fix: remove duplicit instruction and pc in cpu