1 files changed, 16 insertions(+), 8 deletions(-)

M src/control_unit.sv

@@ 83,15 83,23 @@ module control_unit(
     .reg_we(reg_we)
   );
 
-  // if jump, set alu_jump_op
-  // if loading or storing memory or loading pc, always add
-  // else do the register operation
+  // in these cases, alu is used just for addition, nothing else,
+  // so use neither alu_jump, neither alu_reg, use zeros
+  assign alu_override = load_memory || memory_we || load_pc || unconditional_jump;
+
   assign alu_op = conditional_jump ? alu_jump_op :
-                  ((load_memory || memory_we || load_pc) ? 3'b000 :
-                  alu_reg_op);
-  assign alu_add_one = conditional_jump ? alu_jump_add_one : alu_reg_add_one;
-  assign alu_negate = conditional_jump ? alu_jump_negate : alu_reg_negate;
-  assign alu_signed = conditional_jump ? 0 : alu_reg_signed;
+                  alu_override     ? 3'b000      :
+                                     alu_reg_op;
+
+  assign alu_add_one = conditional_jump ? alu_jump_add_one :
+                       alu_override     ? 0'b0             :
+                                          alu_reg_add_one;
+  assign alu_negate = conditional_jump ? alu_jump_negate :
+                      alu_override     ? 0'b0            :
+                                         alu_reg_negate;
+  assign alu_signed = conditional_jump ? 0'b0 :
+                      alu_override     ? 0'b0 :
+                                         alu_reg_signed;
 
   assign pc_src = unconditional_jump ? PC_ALU : PC_PLUS;
   assign alu_src_1 = load_pc ? PC : REG_FILE_RS1;