~ruther/vhdl-spi-2

bd70a2bb — Rutherther 3 months ago
tests: add test for interrupts spi_peripheral
aab4f8c1 — Rutherther 3 months ago
feat(stm): implement proper slave initialization
6a6d53c9 — Rutherther 3 months ago
feat: add test for max divisor (256)
8d761360 — Rutherther 3 months ago
feat: implement spi model narrow sck check
5755b1cc — Rutherther 3 months ago
fix: divisors list had excess element
45799af4 — Rutherther 3 months ago
fix: selected_divisor range
b5bfa2eb — Rutherther 3 months ago
fix: assumptions about synthesizable code
0d966c33 — Rutherther 3 months ago
feat: add initial test for spi peripheral
21e3de55 — Rutherther 3 months ago
fix: master didn't go to invalid data when data are read on first cycle of ready
633b353a — Rutherther 3 months ago
fix: masterslave component inputs tx_valid, rx_ready were outs
88802885 — Rutherther 3 months ago
feat: implement spi memory mapped peripheral
fcd7233f — Rutherther 3 months ago
feat: add test for lsbfirst
c64223e8 — Rutherther 3 months ago
feat: add lsbfirst support
064c8c00 — Rutherther 3 months ago
chore: remove todo comments
b0573427 — Rutherther 3 months ago
fix: rx, tx disabling
54521aad — Rutherther 3 months ago
feat: add csn pulse test and rx, tx disabling test
e70719e8 — Rutherther 3 months ago
feat: add tests for rx blocking
6883a176 — Rutherther 3 months ago
fix: prevent pulses on tx_ready_o, rx_block assertion when rx is ready
9c617e84 — Rutherther 3 months ago
chore: move spi models to separate file
1e50c836 — Rutherther 3 months ago
fix: clkgen for various phases and polarities
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