~ruther/vhdl-spi-2: fix: master didn't go to invalid data when data are read on first cycle of ready

21e3de55dc52c5a3a0d5b5afc70ab42cdff0ff65 — Rutherther 3 months ago 633b353

fix: master didn't go to invalid data when data are read on first cycle of ready

patch browse .tar.gz

1 files changed, 3 insertions(+), 1 deletions(-)

M hdl_spi/src/spi_master_ctrl.vhd

M hdl_spi/src/spi_master_ctrl.vhd => hdl_spi/src/spi_master_ctrl.vhd +3 -1

@@ 276,7 276,9 @@ begin  -- architecture a1
           if rx_ready_i = '0' then
             rx_block <= rx_block_on_full_i;
           end if;
-          next_rx_state <= RX_GOT_DATA;
+          if rx_ready_i = '0' then
+            next_rx_state <= RX_GOT_DATA;
+          end if;
           rx_valid_o <= '1';            -- TODO check
         end if;
       when others =>