feat: add possibility to specify order of input to LSB (only MSB was supported)

feat: split samples to sample and control bits

chore: rename some ports and generics to better match function

Merge pull request #27 from Rutherther/feat/granulatation

Split synced combination and lmfc generation to separate entities

feat: split synced combination and lmfc generation to separate entities

Merge pull request #25 from Rutherther/feat/subclass-1-support

Add subclass 1 support

feat: allow changing align buffer size used in lane alignment

feat: pass synced only if lmfc is aligned after losing synchronization (subclass 1)

feat: change behavior of asserting link nsynced only on frame clk (subclass 0) and multiframe clk (subclass 1)

fix: pass multiframe clk to data link layer

fix: makde default RX buffer delay in bounds

fix: correct condition to generate start lanes for subclass 1

feat: add basic subclass 1 support

chore: specify ranges for all integers

Ranges are not needed inside of tesbenches.
Resolves #22.

fix: adjust jesd204b_link_rx to work with new changes

feat: check configs against receiver configuration

Resolves #17

feat: rename jesd204b_rx to jesd204b_link_rx as it supports only one link

feat: allow synchronization request from outside

feat: prepare architecture for descrambling

feat(toplevel): order all arrays correctly using "to" instead of "downto"