fix: makde default RX buffer delay in bounds

fix: correct condition to generate start lanes for subclass 1

fix: deassert sync on LMFC falling edge to match the standard

feat: add basic subclass 1 support

feat: add lmfc counter clock generator

chore: specify ranges for all integers

Ranges are not needed inside of tesbenches.
Resolves #22.

feat: assume full synchronization after 4 correct 8b10b characters are received after 4 /K/ characters

Resolves #23.

feat: add multipoint link support

fix: set user_data inside of lane_alignment even if ithe buffer is not released yet

tests: adjust tests for new changes

fix: adjust jesd204b_link_rx to work with new changes

 feat: change alignment character of lane_alignment from /A/ to /R/

 Resolves #19

feat: check configs against receiver configuration

Resolves #17

feat: rename jesd204b_rx to jesd204b_link_rx as it supports only one link

feat: make sync aligned to frame clock

Resolves #21

feat: allow synchronization request from outside

feat: count errors in multiframe instead of a frame

feat: prepare architecture for descrambling

fix(lane_alignment): set user data for a character based on state WHILST character is received

User data should be true for data from converters (or sometimes test mode data).
Before, user data were set upon outputting data from the buffer,
but that led to cases where ILAS sequence was counted
as user_data, because it was saved without information about
state of the character and it was assumed the state is the same
upon saving and outputting the octet.

chore: update LICENSE copyright year