fix: some stuff

fix: logic fixes master state

fix: address generator minor issues

fix: start stop condition generator behavior

fix: make sure scl changed after delay

fix: scl generator minor mistakes

feat: add master top entity

feat: synchronize reset in mcu slave tops

feat: add master state entity

feat: add scl generator

feat: add address generator

feat: add start, stop condition generator

feat: add waiting output to slave

feat: add done fields to tx, rx

chore: get rid of "pulse" from scl names

feat: handle errors in slave state

Moves logic of error handling to slave_state
from tx entity.

feat: add unexpected_sda tx signal

refactor: use 'H' std_logic state instead of custom pull up type

tests: add possibility to check sda stability in mcu_slave

tests: add mcu tests working with slave top designs