~ruther/verilog-riscv-semestral-project

verilog-riscv-semestral-project/src/file_program_memory.sv -rw-r--r-- 319 bytes
79c7be5c — Rutherther 2 years ago main
chore: remove unnecessary executable flags

Closes #4.
308a1462 — Rutherther 2 years ago
tests: add register dump, printing
51842d38 — Rutherther 2 years ago
feat: add support for official tests
ee0204c8 — Rutherther 2 years ago
feat: pass program to execute by parameter
938d89a2 — Rutherther 2 years ago
refactor: change program mem to file prog mem
64d33d25 — Rutherther 2 years ago
feat: add program memory