~ruther/verilog-riscv-semestral-project: src/cpu_types.sv bc02aba5f50d84e93657a0601f713d990ecb8f11

~ruther/verilog-riscv-semestral-project

ref: bc02aba5f50d84e93657a0601f713d990ecb8f11 verilog-riscv-semestral-project/src/cpu_types.sv -rwxr-xr-x 291 bytes

b7fa590c — Rutherther 2 years ago

chore: add cpu types for various sources

Better orientation by name instead of
number