~ruther/verilog-riscv-semestral-project: src/cpu_types.sv b7fa590c93b0d8e3e647fb08ecf033e314ece360

~ruther/verilog-riscv-semestral-project

ref: b7fa590c93b0d8e3e647fb08ecf033e314ece360 verilog-riscv-semestral-project/src/cpu_types.sv -rwxr-xr-x 291 bytes

b7fa590c — Rutherther 1 year, 5 months ago

chore: add cpu types for various sources

Better orientation by name instead of
number