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vhdl-spi-2
/hdl_spi
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abfea28a
— Rutherther fix: clock polarity on csn falling and rising. Proper wait after csn falling and before csn rising
3 months ago
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.envrc
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.gitignore
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.project
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manifest.scm
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models/
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src/
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tests/
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vhdl_ls.toml
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