~ruther/vhdl-i2c

ref: 6df1d16dd30159f8f9971cfba2913a78f978a81d vhdl-i2c/src d---------
fix: use synced sda, scl for master, slave entities
feat: store address, rw in address generator or detector
fix: move to bus busy on arbitration err or start condition
fix: count to 9, make i2c frequency 10 MHz
feat: simplify bcd counter
fix: make sure clock divider has 50 % duty cycle
fix: full_on skips indices
fix: many changes
fix: issues on master
fix: issues in master logic
fix: some stuff
fix: logic fixes master state
fix: address generator minor issues
fix: start stop condition generator behavior
fix: make sure scl changed after delay
fix: scl generator minor mistakes
feat: add master top entity
feat: synchronize reset in mcu slave tops
feat: add master state entity
feat: add scl generator
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