~ruther/verilog-riscv-semestral-project

ref: 914e69e6c0df1f4e3f33718891c838e42fe535b1 verilog-riscv-semestral-project/programs/branches.c -rwxr-xr-x 780 bytes 
tests: add more custom tests

feat: store c results in memory addr 0

feat: add branches.c test
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