feat: make RAM word aligned, add byte_enable

Support sb, sh, lb, lh using byte enable
instead of non-word aligned reads and writes.

fix: jump according to zero flag, not LSB zero!!

feat: implement sb, sh, lb, lh support via masking

fix: remove duplicit instruction and pc in cpu

refactor: move memory out of cpu

The cpu will have external memory,
that will allow for better testing
capabilities, and also makes more
sense.

feat: add cpu top level entity