~ruther/verilog-riscv-semestral-project

ref: 18eeb2c56b849ad7bffa04c2e212619237449216 verilog-riscv-semestral-project/tests/comp_list.lst -rwxr-xr-x 197 bytes
34b74f06 — Rutherther 2 years ago
tests: add python test environment for custom tests