~ruther/verilog-riscv-semestral-project

ref: 02405eecab38bfa1d85e88d908b52a589ee53d30 verilog-riscv-semestral-project/src/cpu_types.sv -rwxr-xr-x 291 bytes
chore: add cpu types for various sources

Better orientation by name instead of
number
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