~ruther/vhdl-spi-2

ref: 9ec022e5f06bb1d572c435809c0614e8e33fadde vhdl-spi-2/hdl_spi/models/spi_models.py -rw-r--r-- 7.5 KiB
dfd47b83 — Rutherther 11 months ago
tests: properly account for soonly rising csn
8d761360 — Rutherther 1 year, 1 day ago
feat: implement spi model narrow sck check
b5bfa2eb — Rutherther 1 year, 2 days ago
fix: assumptions about synthesizable code
54521aad — Rutherther 1 year, 4 days ago
feat: add csn pulse test and rx, tx disabling test
9c617e84 — Rutherther 1 year, 4 days ago
chore: move spi models to separate file
6d0d2eed — Rutherther 1 year, 4 days ago
feat: add tests for clock phase, polarity
94410b0e — Rutherther 1 year, 4 days ago
feat: tests for multiple transmissions, rx lost
a026f659 — Rutherther 1 year, 6 days ago
feat: add first basic test
dc0e370a — Rutherther 1 year, 8 days ago
feat: implement initial hdl_spi