tests: wait for half period after stop condition in model

tests: update address detector to use new bus mod

tests: i2c bus model

tests: add message handler for i2c bus model

tests: add packages for communication with i2c bus model

tests: fix address generator done test

feat: store address, rw in address generator or detector

fix: move to bus busy on arbitration err or start condition

tests: diable no_check taking long

fix: many changes

fix: issues on master

tests: advanced master tests

tests: add basic master testbench

fix: some stuff

feat: prepare i2c slave tb model

tests: add address generator testbench

tests: add startstop condition generator testbench

fix: make sure scl changed after delay

tests: add test for scl generator

fix: mcu slave tbs, wait for sync rst