~ruther/verilog-riscv-semestral-project (ee0204c8aee094b0d30256a61ba9400adb01dd5a): / - ditigal.xyz git

~ruther/verilog-riscv-semestral-project

ee0204c8 — Rutherther feat: pass program to execute by parameter 1 year, 5 months ago

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.envrc

10 bytes

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.gitignore

90 bytes

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Makefile

2.2 KiB

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flake.lock

1.5 KiB

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flake.nix

1.3 KiB

d---------

programs/

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src/

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testbench/

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