~ruther/verilog-riscv-semestral-project

ref: a6f4c7fc1c66f05cd78d52e8e3b9229ae58ef2f7 verilog-riscv-semestral-project/tests d---------
a6f4c7fc — Rutherther chore: add new files to compilation list 1 year, 4 months ago
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README.md
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comp_list.lst
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custom/
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official/
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run.py
6.5 KiB
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test_types.py
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