~ruther/verilog-riscv-semestral-project

ref: 489df84930a405a04e27485ed89e224ec6fab8b1 verilog-riscv-semestral-project/programs/tests.c -rwxr-xr-x 132 bytes
489df849 — Rutherther chore: import cpu types in stages 2 years ago 
                                                                                
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void main()
{
	signed char a = -10;
	signed char b = a << 1;
	unsigned char c = ((unsigned char)b) >> 1;
	signed char d = b >> 1;
}