ditigal.xyz
Log in
—
Register
~ruther
/
verilog-riscv-semestral-project
summary
tree
log
refs
ref:
057ee98bbecfb8a284b67bef50b04b70ae18e220
verilog-riscv-semestral-project
/.envrc
-rwxr-xr-x
10 bytes
View
Log
View raw
Permalink
057ee98b
— Rutherther chore: add generated bin, obj gitignore files
1 year, 7 months ago
1
use flake
Do not follow this link