~ruther/verilog-riscv-semestral-project

ref: e5d2c0c5de0541507c602b1d9a5cff2a0cc88494 verilog-riscv-semestral-project/tests/custom/custom_tests.py -rwxr-xr-x 1.9 KiB 
tests: add more custom tests

tests: add register dump, printing

feat: add support for official tests
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