~ruther/verilog-riscv-semestral-project

ref: 9f4ac4dc09c9ccb93c6b1d9726bc7543ff09de00 verilog-riscv-semestral-project/programs/add.c -rwxr-xr-x 116 bytes
30a7f949 — Rutherther 2 years ago
feat: add basic testing programs