~ruther/verilog-riscv-semestral-project

ref: 79c7be5c1c8ae2aea07f48d32abca650d24e8045 verilog-riscv-semestral-project/programs/branches.c -rw-r--r-- 780 bytes 
chore: remove unnecessary executable flags

Closes #4.

tests: add more custom tests

feat: store c results in memory addr 0

feat: add branches.c test
Do not follow this link