~ruther/verilog-riscv-semestral-project

ref: 732301c9f816051cb1b7937d011d3b21d10f68c2 verilog-riscv-semestral-project/programs/add.c -rwxr-xr-x 171 bytes 
feat: store c results in memory addr 0

feat: add basic testing programs
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