~ruther/verilog-riscv-semestral-project: .gitignore 69ced879bbbaf6d106ac95a8ee8e6a6872177c83

~ruther/verilog-riscv-semestral-project

ref: 69ced879bbbaf6d106ac95a8ee8e6a6872177c83 verilog-riscv-semestral-project/.gitignore -rwxr-xr-x 37 bytes

9c81ece2 — Rutherther 2 years ago

chore: add gitignore