~ruther/verilog-riscv-semestral-project

ref: 681756b70c4accd8c4caec6e97d8275a6359e5f9 verilog-riscv-semestral-project/programs/branches.c -rwxr-xr-x 780 bytes
tests: add more custom tests
feat: store c results in memory addr 0
feat: add branches.c test
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