~ruther/verilog-riscv-semestral-project: src/cpu_types.sv 52b05e5db08bd4360a157609d8529e01ad35cfd9

~ruther/verilog-riscv-semestral-project

ref: 52b05e5db08bd4360a157609d8529e01ad35cfd9 verilog-riscv-semestral-project/src/cpu_types.sv -rwxr-xr-x 291 bytes

b7fa590c — Rutherther 2 years ago

chore: add cpu types for various sources

Better orientation by name instead of
number