~ruther/verilog-riscv-semestral-project: tests/test_types.py 489df84930a405a04e27485ed89e224ec6fab8b1

~ruther/verilog-riscv-semestral-project

ref: 489df84930a405a04e27485ed89e224ec6fab8b1 verilog-riscv-semestral-project/tests/test_types.py -rwxr-xr-x 928 bytes

308a1462 — Rutherther 2 years ago

tests: add register dump, printing

51842d38 — Rutherther 2 years ago

feat: add support for official tests