~ruther/verilog-riscv-semestral-project

ref: 18eeb2c56b849ad7bffa04c2e212619237449216 verilog-riscv-semestral-project/programs/link.ld -rwxr-xr-x 291 bytes
30a7f949 — Rutherther 2 years ago
feat: add basic testing programs