chore: move firmware to firmware/ folder

feat: implement application for receiving images

feat: implement dsi, ltdc, otm8009 display

chore: remove test sdram allocation

fix: systick delay

feat: vos0, system clock at 480 MHz

few minorities

chore: split main functions

fix: ability to change pll vcosel, disable pll outputs

feat: implement fmc sdram control

feat: implement clocks enabling

fix: unicode strings

Revert "feat: atomic register modifications"

This reverts commit 997dd77e0476ee3929fdab6b1ad29cef85f32c2b.

feat: implement cdc application layer, fix enumeration

feat: atomic register modifications

fix: usb should not rewrite DIEPCTL bits

feat: add rx data callback, increase tx fifo size

fix: make queue thread safe

fix: ensure register access are inline

tests: add device descriptor test

This is just an initial skeleton of
how the tests could look like.
It's proving hard to think of a good
way to encapsulate the tests. Every
test will need a different set of files
from the project compiled, as some
files should be stubs instead. Additionally,
those stubs could have some commonalities.
It should for example be possible to initialize
the usb device from the tests. It would be good
to implement at least some basic handling
of the usb registers as well. - ie. if you
enable an endpoint and put in data through fifo,
the endpoint should be disabled. It should be
possible to send data from the host to the device
as well - reading from fifo. And stuff like that...