2 files changed, 48 insertions(+), 0 deletions(-)

M include/clocks.h
M src/clocks.c

@@ 1,4 1,5 @@
 #include <stdint.h>
+#include <stdbool.h>
 
 #ifndef CLOCKS_H
 #define CLOCKS_H


@@ 23,6 24,15 @@ typedef enum {
   PLL_SOURCE_NONE = 3,
 } pll_source_t;
 
+typedef enum {
+  CLOCK_HSI,
+  CLOCK_HSE,
+  CLOCK_HSI48,
+} clock_t;
+
+void clocks_enable(clock_t clock);
+bool clocks_ready(clock_t clock);
+void clocks_wait_ready(clock_t clock);
 
 void clocks_pll_configure(clock_pll_t pll, uint8_t divm, pll_source_t source,
                           uint16_t divn, uint8_t divp, uint8_t divq,

@@ 2,6 2,44 @@
 #include "registers.h"
 #include <stm32h747xx.h>
 
+void clocks_enable(clock_t clock) {
+  uint32_t mask = 0;
+  switch (clock) {
+  case CLOCK_HSI:
+    mask = RCC_CR_HSION_Msk;
+    break;
+  case CLOCK_HSE:
+    mask = RCC_CR_HSEON_Msk;
+    break;
+  case CLOCK_HSI48:
+    mask = RCC_CR_HSI48ON_Msk;
+    break;
+  }
+
+  RCC->CR |= mask;
+}
+
+bool clocks_ready(clock_t clock) {
+  uint32_t mask = 0;
+  switch (clock) {
+  case CLOCK_HSI:
+    mask = RCC_CR_HSIRDY_Msk;
+    break;
+  case CLOCK_HSE:
+    mask = RCC_CR_HSERDY_Msk;
+    break;
+  case CLOCK_HSI48:
+    mask = RCC_CR_HSI48RDY_Msk;
+    break;
+  }
+
+  return (RCC->CR & mask) != 0;
+}
+
+void clocks_wait_ready(clock_t clock) {
+  while (!clocks_ready(clock));
+}
+
 void clocks_pll_configure(clock_pll_t pll, uint8_t divm, pll_source_t source,
                           uint16_t divn, uint8_t divp, uint8_t divq,
                           uint8_t divr) {