5 files changed, 43 insertions(+), 47 deletions(-)

M include/delay.h
M src/delay.c
M src/fmc.c
M src/main.c
M src/usb_device.c

@@ 2,33 2,44 @@
 #define DELAY_H
 
 #include <stdint.h>
+#include <stm32h7xx.h>
 
-// TODO: define system clock well
-/* #define SYSTEM_CLOCK    ((uint32_t)360000000UL) */
-#define SYSTEM_CLOCK    ((uint32_t)64000000UL)
-
-/* #define SYSTICK_CALIB 0x3E8 */
-// Underflow every 1 us
-#define SYSTICK_LOAD (SYSTEM_CLOCK/1000UL-1)
-#define SYSTICK_DELAY_CALIB (SYSTICK_LOAD >> 1)
-
-extern uint32_t us_ticks;
-
-#define DELAY_US(us) \
-    do { \
-      for (int i = 0; i < 500000; i++); \
-         /* uint32_t start = us_ticks; \ */ \
-         /* while((us_ticks - start) < us); \ */ \
-    } while (0)
-
-#define DELAY_MS(ms) \
-    do { \
-      for (int i = 0; i < 500000; i++); \
-        /* for (uint32_t i = 0; i < ms; ++i) { \ */ \
-            /* DELAY_US(1000); \ */ \
-        /* } \ */ \
-    } while (0)
-
-void systick_configure();
+#define SYSCLK_HZ       ((uint32_t)480000000UL)
+#define D1CPRE_DIVIDER  ((uint32_t)1UL)
+#define HCLK_DIVIDER    ((uint32_t)2UL)
+
+#define D1CPRE_HZ       (SYSCLK_HZ / D1CPRE_DIVIDER)
+#define HCLK_HZ         (D1CPRE_HZ / HCLK_DIVIDER)
+#define SYSTICK_HZ      (D1CPRE_HZ / 8)
+
+#define HCLK_FREQ_HZ    ((uint32_t)SYSTEM_CLOCK / AHB_DIVIDER / HCLK_DIVIDER)
+
+inline void __attribute__((always_inline)) delay_us(uint32_t us) {
+  uint64_t max_load = 0xFFFFFF;
+  uint64_t total_load = us * (SYSTICK_HZ / 1000000);
+
+  while (total_load > 0) {
+    uint64_t curr_load = total_load;
+    if (total_load > max_load) {
+      curr_load = max_load;
+    }
+    SysTick->LOAD = curr_load;
+
+    SysTick->VAL = 0;
+    SysTick->CTRL = SysTick_CTRL_ENABLE_Msk; // Enable
+
+    while (!(SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk));
+
+    total_load -= curr_load;
+    SysTick->CTRL = 0; // Disable
+  }
+}
+
+
+inline void __attribute__((always_inline)) delay_ms(uint32_t ms) {
+  for (uint32_t i = 0; i < ms; i++) {
+    delay_us(1000);
+  }
+}
 
 #endif // DELAY_H

@@ 1,15 1,2 @@
 #include "delay.h"
 #include <stm32h7xx.h>
-
-uint32_t us_ticks;
-
-void systick_configure() {
-  SysTick->LOAD = SYSTICK_LOAD;
-  SysTick->VAL = 0;
-  SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk; //| SysTick_CTRL_TICKINT_Msk;
-  us_ticks = 0;
-}
-
-void systick_handler() {
-  us_ticks++;
-}

@@ 105,7 105,7 @@ void fmc_sdram_configure(fmc_t *fmc, sdram_bank_t target_bank, fmc_sdram_configu
 
   fmc_sdram_send_command(fmc, target_bank, SDRAM_CLK_ENABLE, 0);
 
-  DELAY_US(config.startup_delay_us);
+  delay_us(timing.startup_delay_us);
 
   fmc_sdram_send_command(fmc, target_bank, SDRAM_PRECHARGE_ALL, 0);
   fmc_sdram_send_command(fmc, target_bank, SDRAM_AUTOREFRESH, 8);

@@ 257,8 257,6 @@ void main()
                   RCC_AHB4ENR_GPIOGEN | RCC_AHB4ENR_GPIOHEN |
                   RCC_AHB4ENR_GPIOIEN | RCC_AHB4ENR_GPIOJEN;
 
-  systick_configure();
-
   // Clocks section
   // Enable hsi48 for usb
   clocks_enable(CLOCK_HSI48);

@@ 52,7 52,7 @@ void usb_device_reset(void* device_ptr) {
   while (device->core->GRSTCTL & USB_OTG_GRSTCTL_CSRST);
   // Wait for idle
   while ((device->core->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0);
-  DELAY_US(3);
+  delay_us(3);
 }
 
 void usb_device_clear_interrupts(void* device_ptr) {


@@ 78,7 78,7 @@ void usb_device_setup(void* device_ptr) {
   usb_device_t* device = (usb_device_t*)device_ptr;
 
   device->device->DCTL |= USB_OTG_DCTL_SDIS;
-  DELAY_US(3);
+  delay_us(3);
 
   PWR->CR3 |= PWR_CR3_USB33DEN;
   while ((PWR->CR3 & PWR_CR3_USB33RDY) == 0);


@@ 88,9 88,9 @@ void usb_device_setup(void* device_ptr) {
 
   device->core->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD;
 
-  DELAY_US(3);
+  delay_us(3);
   usb_device_reset(device_ptr);
-  /* DELAY_US(3); */
+  delay_us(3);
 
   *(uint32_t*)((uint8_t*)device->core + USB_OTG_PCGCCTL_BASE) = 0;