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vhdl-spi-2
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stm_spi_funduino
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abfea28a
— Rutherther fix: clock polarity on csn falling and rising. Proper wait after csn falling and before csn rising
5 months ago
..
-rw-r--r--
delay.h
635 bytes
-rw-r--r--
display.h
1.1 KiB
-rw-r--r--
exti.h
793 bytes
-rw-r--r--
pin.h
1.4 KiB
-rw-r--r--
registers.h
3.9 KiB
-rw-r--r--
spi.h
1.3 KiB
-rw-r--r--
timer.h
817 bytes
-rw-r--r--
uart.h
1.3 KiB
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