~ruther/vhdl-spi-2 (98fdc2a71b1659c3d65e838503aa607502a8bb09): hdl_spi/.gitignore

~ruther/vhdl-spi-2

ref: 98fdc2a71b1659c3d65e838503aa607502a8bb09 vhdl-spi-2/hdl_spi/.gitignore -rw-r--r-- 94 bytes

98fdc2a7 — Rutherther tests: add proper checks for clock polarity before and after csn 3 months ago

modelsim.ini
sim_build/
__pycache__/
transcript
vsim.wlf
vsim_stacktrace.vstf
core
results.xml