~ruther/vhdl-spi-2

ref: 21e3de55dc52c5a3a0d5b5afc70ab42cdff0ff65 vhdl-spi-2/hdl_spi/.gitignore -rw-r--r-- 94 bytes
21e3de55 — Rutherther fix: master didn't go to invalid data when data are read on first cycle of ready 1 year, 3 days ago 
                                                                                
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modelsim.ini
sim_build/
__pycache__/
transcript
vsim.wlf
vsim_stacktrace.vstf
core
results.xml