~ruther/verilog-riscv-semestral-project

ref: e5d2c0c5de0541507c602b1d9a5cff2a0cc88494 verilog-riscv-semestral-project/programs/add.c -rwxr-xr-x 171 bytes
e5d2c0c5 — Rutherther tests: add simple ma.c program for testing misaligned access 1 year, 4 months ago
                                                                                
1
2
3
4
5
6
7
8
9
10
11
12
13
14
int add(int a, int b)
{
    return a + b;
}

void main()
{
    int a = 20;
    int b = 30;
    int c = add(a, b);

    int* result_address = 0;
    *result_address = c;
}
Do not follow this link