~ruther/verilog-riscv-semestral-project

ref: aeab403896e168bc0c44a65883d46bb96689b7fb verilog-riscv-semestral-project/.envrc -rwxr-xr-x 10 bytes
aeab4038 — Rutherther feat: add forwarding signal for better debugging 1 year, 4 months ago 
                                                                                
1

use flake
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