~ruther/verilog-riscv-semestral-project

ref: a400aceb574400fad6b269927793a5c13aab647c verilog-riscv-semestral-project/.envrc -rwxr-xr-x 10 bytes
a400aceb — Rutherther feat: make RAM word aligned, add byte_enable 2 years ago 
                                                                                
1

use flake