~ruther/verilog-riscv-semestral-project

ref: 73cf8a16605792f3455e04745c5e0007e1f08be5 verilog-riscv-semestral-project/programs/start.S -rwxr-xr-x 94 bytes
73cf8a16 — Rutherther tests: fix simple cpu test to use memory.dump and doesnt wait for ebreak 2 years ago 
                                                                                
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.global _start

.text
_start:
    addi sp, x0, 1020
    call main
loop:
    ebreak
    j loop