~ruther/verilog-riscv-semestral-project

ref: 37437a002b69c937712b58ce3782f510248fcdcc verilog-riscv-semestral-project/programs/start.S -rwxr-xr-x 94 bytes
37437a00 — Rutherther chore: remove first unused register 1 year, 5 months ago 
                                                                                
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.global _start

.text
_start:
    addi sp, x0, 1020
    call main
loop:
    ebreak
    j loop
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