~ruther/verilog-riscv-semestral-project

ref: 2867e24626f7c4643ffa93cb6ea28f24d3eb2dae verilog-riscv-semestral-project/.gitignore -rwxr-xr-x 52 bytes
2867e246 — Rutherther fix: do not set subtract for non-R instructions 2 years ago 
                                                                                
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.DS_Store
.idea
*.log
tmp/

.direnv/
obj_dir/
*.vcd