~ruther/verilog-riscv-semestral-project

ref: 181e94c4c368df49b63ee435f623436482f2f6a2 verilog-riscv-semestral-project/.gitignore -rwxr-xr-x 52 bytes
181e94c4 — Rutherther chore: add risc toolchain to flake 2 years ago 
                                                                                
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.DS_Store
.idea
*.log
tmp/

.direnv/
obj_dir/
*.vcd