~ruther/verilog-riscv-semestral-project: tests/official/env feat/misaligned-reads

~ruther/verilog-riscv-semestral-project

ref: feat/misaligned-reads verilog-riscv-semestral-project/tests/official/env d---------

308a1462 — Rutherther 1 year, 6 months ago

tests: add register dump, printing

51842d38 — Rutherther 1 year, 6 months ago

feat: add support for official tests