~ruther/verilog-riscv-semestral-project: .gitignore e3c95ad31853db8d3df0f933168a2f8ad6dd370c

~ruther/verilog-riscv-semestral-project

ref: e3c95ad31853db8d3df0f933168a2f8ad6dd370c verilog-riscv-semestral-project/.gitignore -rwxr-xr-x 37 bytes

9c81ece2 — Rutherther 2 years ago

chore: add gitignore