~ruther/verilog-riscv-semestral-project

ref: df876b38b787b7f1e9120775311a0b1a17e2758b verilog-riscv-semestral-project/programs/link.ld -rwxr-xr-x 291 bytes
30a7f949 — Rutherther 2 years ago
feat: add basic testing programs