~ruther/verilog-riscv-semestral-project: .gitmodules df876b38b787b7f1e9120775311a0b1a17e2758b

~ruther/verilog-riscv-semestral-project

ref: df876b38b787b7f1e9120775311a0b1a17e2758b verilog-riscv-semestral-project/.gitmodules -rwxr-xr-x 137 bytes

51842d38 — Rutherther 1 year, 5 months ago

feat: add support for official tests