~ruther/verilog-riscv-semestral-project: programs/ma.c af6386a7cb0eb3b58cd754956dca300d416cbcde

~ruther/verilog-riscv-semestral-project

ref: af6386a7cb0eb3b58cd754956dca300d416cbcde verilog-riscv-semestral-project/programs/ma.c -rw-r--r-- 282 bytes

fb02ebb2 — Rutherther 2 years ago

Merge pull request #2 from Rutherther/feat/misaligned-reads

Support misaligned read

e5d2c0c5 — Rutherther 2 years ago

tests: add simple ma.c program for testing misaligned access